A graph is plotted by taking the forward bias voltage (V) along the x- axis and the current (I) through the diode along y-axis. This graph is called the forward V-I characteristics.

The internal repulsion of the depletion layer stops further diffusion of free electrons across the junction. This difference in potential across the depletion layer is called barrier potential.

Step 1: AC (1 + B) = AC.1 [OR law-2]
Step 2: AC . 1 = AC [AND law – 2]
Therefore, AC + ABC = AC
Thus the Boolean identity is proved.
Circuit Description

α = \(\frac{I_C}{I_E}\)
I_C = α I_E = 0.95 x 1 = 0.95 mA
I_E = I_B + I_C
∴ I_B = I_E - I_C = 1 - 0.95 = 0.05 mA

(i) The emitter-base junction is forward biased by a dc power supply Vm and the collector-based junction is reverse biased by the bias power supply V_cB
(ii) The forward bias across the emitter base junction causes the majority charge carriers electrons in the emitter region to flow towards the base region and constitutes the emitter current (I_E).
(iii) Since the base region is very narrow, most of the electrons reach the collector region.
(iv) The electrons that reach the collector region will be attracted by the collector terminal as it has positive potential and flows through the external circuit. This constitutes the collector current(I_c)
(v) The holes that are lost due to recombination in the base region ate replaced by the positive potential of the bias voltage V_EE and constitute the base current (I_B)
\( \mathrm{I}_{\mathrm{E}}=\mathrm{I}_{\mathrm{B}}+\mathrm{I}_{\mathrm{C}} \)
\(\mathrm{I}_{\mathrm{E}} \approx \mathrm{I}_{\mathrm{C}} \)     \((\because \mathrm{I}_{\mathrm{B}} is\ very\ small )\)

The leakage current is the current that the diode will leak when a reverse bias is applied to it.

First Theorem :
The complement of the sum of two logical inputs is equal to the product of its complements.
\(\overline { A+B } \) = \(\bar { A } .\bar { B } \)
Proof:
(i) The Boolean equation for NOR gate is Y = \(\overline { A+B } \)
(ii) The Boolean equation for a bubbled AND gate is Y =\(\bar { A } .\bar { B } \)
(iii) Both cases generate same outputs for same inputs. It can be verified using the following truth

(i) From the above truth table, we can conclude \(\overline { A+B } \) = \(\bar { A } .\bar { B } \)
(ii) Thus De Morgan's first theorem is proved.
(iii) Hence, a NOR gate is equal to a bubbled AND gate

Second theorem :
The complement of the product of two is equal to the sum of its complements
\(\overline { A.B } \) = \(\bar { A } +\bar { B } \)
Proof:
(i) The Boolean equation for NAND gate is Y = \(\overline { A.B } \)
(ii) The Boolean equation for bubbled OR gate is Y = \(\bar { A } +\bar { B } \)
(iii) A and B are the inputs and Y is the output. The above two equations produces the same output for the same inputs. It can be verified by using the truth table.

(i) From the above truth table, we can conclude \(\overline { A.B } \) = \(\bar { A } +\bar { B } \)
(ii) Thus, De Morgan's second therom is proved.
(iii) Hence, a NAND gate is equal to a bubbled OR gate.

i) AND gate
a) Circuit Symbol:
The circuit symbol of a two input AND gate is shown in Figure (a). A and B are inputs and Y is the output. It is a logic gate and hence A, B, and Y can have the value of either 1 or 0

Two input AND gate

Truth table
b) Boolean equation:
Y = A.B
It performs logical multiplication and is different from arithmetic multiplication.
c) Logic operation:
The output of AND gate is high only when all the inputs are high. In the rest of the cases, the output is low. It is represented in the truth table (Figure (b).
ii) OR gate
a) Circuit Symbol:
The circuit symbol of a two input OR gate is shown in Figure (a). A and B are inputs and Y is the output. 

The input OR gate

Truth table
a) Boolean equation:
A + B = Y
It performs logical addition and is different from arithmetic addition.
b) Logic operation:
The output of OR gate is high (logic 1 state) when either of the inputs or both are high. The truth table of OR gate is shown in Figure (a).
iii) NOT gate
a) Circuit Symbol:
The circuit symbol of NOT gate is shown in Figure (a). A and B are inputs and Y is the output. 

NOT gate

Truth table
a) Boolean equation:
Y = Ā
b) Logic operation:
The output is the complement of the input. It is represented with an overbar. It is also called as inverter. The truth table infers that the output Y is I when input A is 0 and vice versa. The truth table of NOT is shown in Figure (b).
iv) NAND gate
a) Circuit Symbol:
The circuit symbol of NAND gate is shown in Figure (a). A and B are inputs and Y is the output.

Two input NAND gate

Truth table
b) Boolean equation:
Y = \(\overline { A.B } \)
Logic operation:
The output Y equals, the complement of AND operation. The circuit is an AND gate followed by a NOT gate. Therefore, it is summarized as NAND. The output is at logic zero only when all the inputs are high. The rest of the cases, the output is high (Logic I state). The truth table of NAND gate is shown in Figure (b).
v) NOR gate
a) Circuit Symbol:
The circuit symbol of NOR gate is shown in Figure (a). A and B are inputs and Y is the output.

Two input NANS gate

Truth table
Boolean equation:
Y =  \(\overline { A+B } \)
Logic operation:
The output Y equals the complement of OR operation (A OR B). The circuit is an OR gate followed by a NOT gate and is summarized as NOR. The output is high when all the inputs are low. The output is low for all other combinations of inputs. The truth table of NOR gate is shown in Figure (b).
vi) Ex-OR gate
a) Circuit Symbol:
The circuit symbol of Ex-OR gate is shown in Figure (a). A and B are inputs and Y is the output. The Ex-OR operation is denoted as ⊕

Ex-OR gate

Truth table
b) Boolean equation
Y =  \(A.\overline { B } \) + \(\overline { A }.B \)
Y = A ⊕ B
Logic operation: 
The output is high only when either of the two inputs is high. In the case of an Ex-OR gate with more than two inputs, the output will be high when odd number of inputs are high. The truth table of Ex-OR gate is shown in Figure (b).

(i)  It is the branch of physics incorporated with technology towards the design of circuits using transistors and microchips.
(ii) It depicts the behavior and movement of electrons in a semiconductor, vacuum, or gas.
(iii) Electronics deals with electrical circuits that involve active components such as transistors, diodes, integrated circuits, and sensors, associated with the passive components like resistors, inductors, capacitors, and transformers.

\(\mathrm{V}_{\mathrm{cc}}=12 \mathrm{~V}, \mathrm{R}_{\mathrm{B}}=10 \mathrm{k} \Omega, \mathrm{R}_{\mathrm{E}}=1 \mathrm{k} \Omega, \mathrm{R}_{\mathrm{c}}=1+1=2 \mathrm{k} \Omega, \alpha=0.99, \mathrm{~V}_{\mathrm{BE}}=0.7 \mathrm{~V}, \mathrm{I}_{\mathrm{c}}=?\)
\(\beta=\alpha /(1-\alpha)=0.99 /(1-0.99)=99\)
\(\mathrm{I}_{\mathrm{B}}=\mathrm{I}_{\mathrm{C}} / \beta=\mathrm{I}_{\mathrm{c}} / 99\)
Applying Kirchoff's Voltage law,
\(I_C R_C+I_n R_n+I_E R_E+V_{u t}=V\)
\(2 \times 10^3 \mathrm{I}_{\mathrm{C}}+10 \times 10^3\left(\mathrm{I}_{\mathrm{C}} / 99\right)+1 \times 10^3\left(\mathrm{I}_{\mathrm{C}}+\mathrm{I}_{\mathrm{C}} / 99\right)+0.7=12 \quad\left(\because \mathrm{I}_{\mathrm{E}}=\mathrm{I}_{\mathrm{n}}+\mathrm{I}_{\mathrm{C}}\right)\)
\(\therefore \mathrm{I}_{\mathrm{C}}=\frac{11.3 \times 10^{-3} \times 99}{298}\)
\(\mathrm{I}_{\mathrm{C}}=3.7 \times 10^{-3} \mathrm{~A}=3.7 \mathrm{~mA}\)