(i) De Morgan's First theorem states that the complement of the sum of two inputs is equal to the product of its complements.
\(\overline{\mathrm{A}+\mathrm{B}}=\overline{\mathrm{A}} \cdot \overline{\mathrm{B}}\)
(ii) The second theorem states that the complement of the product of two inputs is equal to the sum of its complements.
\(\overline{\mathrm{A} \cdot \mathrm{B}}=\overline{\mathrm{A}}+\overline{\mathrm{B}}\)

(i) If the portion of the output fed to the input is in phase with the input, then the magnitude of the input signal increases
(ii) It is necessary for sustained oscillations.

(i) The output signal is reversed by 180^o. During the positive half cycle, Input signal (V_s) increases the forward voltage across the emitter-base.
(ii) As a resultthe base current (I_B) increases. Consequently, the collector current (I_C) increases ß times. 
(iii) This increases the voltage drop across R_c (I_C R_C) which in turn decreases the collector-emitter voltage (V_CE).
(iv) Therefore, the input signal in the positive direction produces an amplified signal in the negative direction at the output.

(i) The emitter-base junction is forward biased by a dc power supply Vm and the collector-based junction is reverse biased by the bias power supply V_cB
(ii) The forward bias across the emitter base junction causes the majority charge carriers electrons in the emitter region to flow towards the base region and constitutes the emitter current (I_E).
(iii) Since the base region is very narrow, most of the electrons reach the collector region.
(iv) The electrons that reach the collector region will be attracted by the collector terminal as it has positive potential and flows through the external circuit. This constitutes the collector current(I_c)
(v) The holes that are lost due to recombination in the base region ate replaced by the positive potential of the bias voltage V_EE and constitute the base current (I_B)
\( \mathrm{I}_{\mathrm{E}}=\mathrm{I}_{\mathrm{B}}+\mathrm{I}_{\mathrm{C}} \)
\(\mathrm{I}_{\mathrm{E}} \approx \mathrm{I}_{\mathrm{C}} \)     \((\because \mathrm{I}_{\mathrm{B}} is\ very\ small )\)

S.No	Avalanche breakdown	Zener breakdown
(i)	Heavily doped p-n junctions have narrow depletion layers of the order of <10-6 m.	It occurs in lightly doped junctions  Which have wide depletion layers.
(ii)	Electric field produced is strong in nature.	Weak electric field is produced.
(iii)	When a reverse voltage across the junction is increased to the breakdown limit, a very strong electric field is set up. It ruptures the covalent bonds in the lattice and thereby generating electronic-hole pairs. This effect is called Zener effect	Thermally generated minority charge carriers accelerated by the electric field gains sufficient kinetic energy, collide with the semiconductor atoms while passing through the depletion region. This leads to the breaking of covalent bonds and in turn covalent bonds and in turn generates electron-hole pairs
(iv)	Even a small further increases in reverse voltage produces a large number of charge carriers. Hence the junction has very low resistance in the breakdown region.	The newly generated charged carriers are also accelerated by the electric field resulting in more collisions and further production of charged carriers.
(v)	This process of emission of electrons due to the strong electric field is known as internal field emission or field ionization.	This cumulative process leads to an avalanche of charge carriers across the junction and consequently reduces the reverse resistance the diode current increases sharply.

The leakage current is the current that the diode will leak when a reverse bias is applied to it.

When a PN junction diode is forward biased, the depletion region decreases and the diode conduct once after the barrier potential is crossed, when it is reverse biased the depletion region increases and the diode does not conduct sci it is called as unidirectional device.

The process of adding impurities to the instrinsic semiconductor is called doping.

S.No Intrinsic semiconductor Extrinsic semiconductor (i)  A semiconductor in its pure form without impurity is called an intrinsic
semiconductor. When small amount of impurity is doped in pure semiconductors it becomes extrinsic semiconductors.
  (ii) The number of free electrons in conduction band is almost equal to number of holes in valence band. The number of free electrons and holes is never equal. (iii) Electrical conductivity is a function of temperature along. Its electrical conductivity depends upon the temperature as well as on the quantity of impurity atoms doped the structure.

(i) To move the hole in a given direction, the valence electrons move in the opposite direction.
(ii) Electrons flow in a N-type semiconductor is similar to electrons moving in a metallic wire.
(iii) The N- type dopant atoms will yield electrons available for conduction.

(i) In NPN transistor, a positive voltage is given to the collector terminal to produce a current flow from the collector to the emitter.
(ii) In a PNP transistor, a positive voltage is given to the emitter terminal to produce current flow from the emitter to collector.
(iii) To operate the transistor in the active region, emitter-base must be forward biased and collector base must be reverse biased.

(i) A Semiconductor in its pure form without impurity is called an intrinsic semiconductor.
(ii) Impurity means any other atom in the crystal lattice.

(iii) Each silicon atom has four electrons in the outmost orbit and is covalently bonded with the neighboring atoms to form the lattice. The band diagram is shown in the figure.

(iv) A small increase in temperature is sufficient enough to break some of the covalent bonds and release the electrons free from the lattices as shown in figure.

(v) The vacancies produced in the valence band are called holes. As the holes are dericiency of electrons, they are treated to possess positive charges Hence electrons and holes are the two charge carriers in semiconductors.

(vi) The number of electrons in the conduction band is equal to the number of holes in the valance band. The conduction is done to the electrons in the conduction band and holes in the valence band.
\(\begin{array}{l} I=I_c+I_{\mathrm{h}} \\ I=\text { Total current } \\ I_e=\text { Electron current } \\ I_{\mathrm{h}}=\text { hole current } \end{array}\)
(vii) It behaves like an insulator at 0 K. The increase in temperature increases the number of charge carriers.
(viii) The intrinsic carrier concentration is the number of electron in the conduction band or number of holes in the valence band in an intrinsic semi conductor.

i) AND gate
a) Circuit Symbol:
The circuit symbol of a two input AND gate is shown in Figure (a). A and B are inputs and Y is the output. It is a logic gate and hence A, B, and Y can have the value of either 1 or 0

Two input AND gate

Inputs		outputs
A	B	Y = A + B
0	0	0
0	1	0
1	0	0
1	1	1

Truth table
b) Boolean equation:
Y = A.B
It performs logical multiplication and is different from arithmetic multiplication.
c) Logic operation:
The output of AND gate is high only when all the inputs are high. In the rest of the cases, the output is low. It is represented in the truth table (Figure (b).
ii) OR gate
a) Circuit Symbol:
The circuit symbol of a two input OR gate is shown in Figure (a). A and B are inputs and Y is the output. 

The input OR gate

Inputs		outputs
A	B	Y = A + B
0	0	0
0	1	1
1	0	1
1	1	1

Truth table
a) Boolean equation:
A + B = Y
It performs logical addition and is different from arithmetic addition.
b) Logic operation:
The output of OR gate is high (logic 1 state) when either of the inputs or both are high. The truth table of OR gate is shown in Figure (a).
iii) NOT gate
a) Circuit Symbol:
The circuit symbol of NOT gate is shown in Figure (a). A and B are inputs and Y is the output. 

NOT gate

Inputs	Output
A	Y = Ā
0	1
1	0

Truth table
a) Boolean equation:
Y = Ā
b) Logic operation:
The output is the complement of the input. It is represented with an overbar. It is also called as inverter. The truth table infers that the output Y is I when input A is 0 and vice versa. The truth table of NOT is shown in Figure (b).
iv) NAND gate
a) Circuit Symbol:
The circuit symbol of NAND gate is shown in Figure (a). A and B are inputs and Y is the output.

Two input NAND gate

Inputs		Output (AND)	outputs (NAND)
A	B	Z = A.B	Y = \(\overline { A.B } \)
0	0	0	1
0	1	0	1
1	0	0	1
1	1	1	0

Truth table
b) Boolean equation:
Y = \(\overline { A.B } \)
Logic operation:
The output Y equals, the complement of AND operation. The circuit is an AND gate followed by a NOT gate. Therefore, it is summarized as NAND. The output is at logic zero only when all the inputs are high. The rest of the cases, the output is high (Logic I state). The truth table of NAND gate is shown in Figure (b).
v) NOR gate
a) Circuit Symbol:
The circuit symbol of NOR gate is shown in Figure (a). A and B are inputs and Y is the output.

Two input NANS gate

Inputs		Output (OR)	outputs (NOR)
A	B	Z = A + B	Y = \(\overline { A+B } \)
0	0	0	1
0	1	1	0
1	0	1	0
1	1	1	0

Truth table
Boolean equation:
Y =  \(\overline { A+B } \)
Logic operation:
The output Y equals the complement of OR operation (A OR B). The circuit is an OR gate followed by a NOT gate and is summarized as NOR. The output is high when all the inputs are low. The output is low for all other combinations of inputs. The truth table of NOR gate is shown in Figure (b).
vi) Ex-OR gate
a) Circuit Symbol:
The circuit symbol of Ex-OR gate is shown in Figure (a). A and B are inputs and Y is the output. The Ex-OR operation is denoted as ⊕

Ex-OR gate

Inputs		outputs (Ex-OR)
A	B	Y = A ⊕ B
0	0	0
0	1	1
1	0	1
1	1	0

Truth table
b) Boolean equation
Y =  \(A.\overline { B } \) + \(\overline { A }.B \)
Y = A ⊕ B
Logic operation: 
The output is high only when either of the two inputs is high. In the case of an Ex-OR gate with more than two inputs, the output will be high when odd number of inputs are high. The truth table of Ex-OR gate is shown in Figure (b).